Sound on the Atari computer is generated by the POKEY chip. There are 4 independent channels (or speakers) for sound creation. Because each channel can be controlled independently, 4 different sounds can be generated simultaneously. For example, one channel could play the melody of a tune while another played the base.
    The sound system is manipulated by 9 bytes. The first 8 bytes are the Audio Frequency and Control Registers for each of the 4 channels. The last byte, called Audio Control (AUDCTL), alters sound for all 4 channels. Below, table 1 provides the names and addresses of these bytes. It may be helpful to refer back periodically to this table.

Name	(Symbol)	loc. dec/hex
Channel 1 frequency	(AUDF1)	53760/D200
Channel 1 control	(AUDC1)	53761/D201
Channel 2 frequency	(AUDF2)	53762/D202
Channel 2 control	(AUDC2)	53763/D203
Channel 3 frequency	(AUDF3)	53764/D204
Channel 3 control	(AUDC3)	53765/D205
Channel 4 frequency	(AUDF4)	53766/D206
Channel 4 control	(AUDC4)	53767/D207
Audio Control Byte	(AUDCTL)	53768/D208

    The foundation of the sound system is the internal clock. This clock is able to send thousands, or even millions, of electronic pulses to the sound system every second. The rate of these pulses determines the standard frequency for sound generation. Faster clock rates produce higher pitch sounds than do slower clock rates. The clock can be set by the user at frequencies of 15 KHz, 64 KHz and 1.79 MHz.(see below)




    As mentioned earlier, each of the 4 channels has a Frequency Register. The Frequency Registers determine the percentage of clock pulses that will be used in the creation of the audio frequency. The computer divides the clock rate by the value in the Frequency Register to determine the audio frequency. For example, suppose the clock rate is 64 KHz, and the Frequency Register is `8.'(see below)

64,000 Hz 64 KHz

(Hertz)          64,000 Hz = 8,000 Hz
Freq Reg =        8

    In the above example, the audio frequency would be 8,000 pulses a second (8 KHz). The higher the frequency, the higher will be the pitch of the sound it produces.


    Each Frequency Register has a corresponding Control Register. As a multi purpose byte, the Control Registers set both the distortion and volume for each audio channel. Although the 4 Control Registers manipulate their own audio channel, they use the same bit structure as displayed below.

AUDC1-4

Distortion			Vol Only	Volume
7 6 5 4 3 2 1 0

    The Control Register bytes consist of 3 sections: distortion, `volume only,' and volume. For simplicity, each of the 3 sections will be examined independently.


    Distortion is a measure of variance from a pure tone. For example, the rumble from a car engine is much more distorted than is a note played by a musical instrument. Distortion is used to alter a pure tone so that special sound effects can be created. The 3 high bits of a Control Register determine audio distortion.
    The Atari computer contains 3 generators of somewhat random numbers, called Polys. Having lengths of 4, 5, and 17 bits, these Polys vary in their proximity to randomness. The longer Polys are much more random than are the shorter ones. Distortion is attained by `mixing' the regular pulses from the Audio Frequency with the random pulses from the Poly. As a result, the 17 bit poly tends to produce a more irregular (rushing) sound, whereas the 4 bit poly tends to produce a more systematic (idling) sound. Below, is a partial display of the Control Register bit configuration and the corresponding polys.



AUDC1-4

7   6   5 not used for distortion
0	0	0	5 bit then 17 bit poly
0	0	1	5 bit poly
0	1	0	5 bit then 4 bit poly
1	0	0	17 bit poly
1	0	1	no poly used
1	1	0	4 bit poly

Volume

    The lower 4 bits of a Control Register hold a number that determines the sound volume. A value of `0' means no volume; whereas a value of 15 means maximum volume.

Volume Only Bit

    When the television speaker receives electronic pulses it vibrates to make sound. Setting the 4th bit of the Control Register enables the Volume Only Mode which eliminates any repeating vibrations in the speaker. As a result, the only sound to be heard will be a short click.




    Below is a table of possible Frequency Register values and the musical notes they will generate.



Audio Frequency Musical Note

	Dec	Hex
High	29	1D	C
Range	31	1F	B
	33	21	A# or Bb
	35	23	A
	37	25	G# or Ab
	40	28	G
	42	2A	F# or Gb
	45	2D	F
	47	2F	E
	50	32	D# or Eb
	53	35	D
	57	39	C# or Db
	60	3C	C
	64	40	B
	68	44	A# or Bb
	72	48	A
	76	4C	G# or Ab
	81	51	G
	85	55	F# or Gb
	91	5B	F
	96	60	E
Middle	102	66	D# or Eb
Range	108	6C	D
	114	72	C# or Db
	121	79	C
	128	80	B
	136	88	A# or Bb
	144	90	A
	153	99	G# or Ab
	162	A2	G
	173	AD	F# or Gb
	182	B6	F
	193	C1	E
	204	CC	D# or Eb
	217	D9	D
Low	230	E6	C# or Db
Range	243	F3	C

    Now that the relevant sound controlling addresses have been explained, it is time for some practical applications. For example, suppose you want to generate a middle `C' note (sound) at maximum volume without distortion, using channel 1. The first step in doing this is to examine the above table of music notes (table 3) to see what number corresponds with a middle `C.' Examination of table 3 will reveal that this note is represented by a value of `121' ($79 hex). In order to tell the computer to play a `C' note, POKE this value of 121 into the address of Frequency Register for channel 1 (53760 dec) (D200 hex).

POKE 53760,121

    The second step is to generate maximum volume without any distortion by setting the 4 low bits of the Control Register of channel l. In other words, to have maximum volume, a value of at least `15' must be POKEd into this Register. (see below)

Control Register AUDC1-4

Distortion
+ Vol only	Volume
7 - 4 3 2 1 0 0 + 23 22 21 20		= 15

    The third step is to eliminate any distortion setting from the Control Register. Because distortion results from using one of the randomizing polys, all polys should be disconnected. To accomplish this, examine the partial reprint of table 2 (below) in order to find the distortion setting which does not use a poly. (see below)

Distortion

Partial Bit Configuration (for poly(s)

Control Register AUDC1-4

7   6   5   - not used for   - distortion
1)	0	0	0	5 bit then 17 bit poly
2)	0	0	1	5 bit poly
3)	1	0	1	no poly used < use this one

 7  6   5
 2 + 0 + 2 =

128    +    0    +    32 = 160

    Because the 3rd distortion setting in the above table does not use a poly, it will cause the computer to produce a pure tone. To enable this option, bits 5 and 7 must be converted into their decimal equivalent. This is done by using the numbers of the set bits between 5 and 7 as powers of 2, and adding them together. The above diagram does this by adding 2^7 to 2^5 to yield a sum of 160, the decimal equivalent of the `no poly option.'
    The fourth and final step is to add the volume value (15) to the distortion value (160). The sum of this (175) represents the input for the Control Register for channel l .

AUDC 1 = Control Register 1 = 53761

POKE 53761,175

Below is a short program which performs the same sound operations described above.

10 REM set sound frequency
20 POKE 53760,121
30 REM
40 REM set distortion and volume
50 REM 53761,175
60 REM
70 REM GOTO 10


    In addition to the Frequency and Control bytes which independently control the 4 audio channels, there is option byte that affects all channels. Called the Audio Control byte (AUDCTL), this location allows the user to modify the existing sound system. Each bit in the AUDCTL has a specific assignment. (see below)

AUDCTL    53768 dec    D208 hex

Bit: Explanation

7    Changes a 17 bit poly into a 9 bit poly
6    Clock channel 1 with 1.79 MHz
5    Clock channel 3 with 1.79 MHz
4    Join channels 1 and 2 (16 bit)
3    Join channels 3 and 4 (16 bit)
2    Inserts high-pass filter into channel 1, clocked by channel 3
1    Inserts high pass filter into channel 2, clocked by channel 4
0    Switch main clock base from 64 KHz to 15 KHz

    Because the Audio Control contains a number of commands, I will, for clarity, go through them in reverse order, starting with the 7th bit and ending with the first.

BIT 7

    Setting bit 7 causes the 17 bit poly counter to be changed to a 9 bit format. This shorter poly produces a distortion pattern that is more repetitious. The following program demonstrates the difference in sound between a 17 bit and 9 bit polys. Use the joystick to choose which poly to include in sound generation.

10 REM ****************************
15 REM *                          *
20 REM * 17-9 BIT POLY CONVERSION *
25 REM *                          *
30 REM ****************************
50 L=2
90 SOUND 0,0,0,0
100 GRAPHICS 0
102 POKE 752,1
104 POSITION 4,5
105 ? ""
106 P0SITION 6,14
107 ? "use joystick (0)    up/down "
108 POSITION 5,10
109 ? "Current status:"
110 REM *
120 REM * give channel 1 a frequency *
130 REM * setting                    *
140 POKE 53760,121
150 REM *
160 REM * give channel 1 Volume     *
170 REM * and a distortion setting  *
175 REM * that uses the 17 bit poly *
180 POKE 53761,143
190 REM *
200 REM * input joystick data *
210 ST=STICK (0)
220 IF ST=14 THEN L=2
230 IF ST=13 THEN L=1
240 REM *
250 REM * modify 17 bit poly?(AUDCTL)*
260 REM *
270 REM * 17 bit poly *
280 IF L=2 THEN POKE 53768,128
290 REM *
300 REM * 9 bit poly *
310 IF L=1 THEN POKE 53768,0
320 REM *
330 POSITION 23,10
340 IF L=2 THEN ? " 9 bit poly"
350 IF L=1 THEN ? "17 bit poly"
500 GOTO 210


0 REM CHECK DATA FOR 17-9 POLY CONVERSION
10 DATA 6287,728,465,316,466,722,475,41,5,920,146,104,198,720,195,9,635,150
130 DATA 8949,117,124,639,913,148,989,133,643,623,73,393,392,639,922,641,687,873
290 DATA 4066,644,634,759,638,240,154,169,828

BIT 6&5

    Setting bit 6 causes audio channel 1 to be assigned a clock rate of 1.79 MHz. (1.79 million pulses a second), whereas setting bit 5 causes audio channel 3 to be assigned that same rate. The following program reveals the change in sound produced from one frequency and control setting at different clock rates (15 KHz, 64 KHz and 1.79 MHz).

10 REM *********************
15 REM *                   *
20 REM *  CLOCK RATE TEST  *
25 REM *                   *
30 REM *********************
50 S=2
60 GRAPHICS 0
65 POKE 752,1
67 POSITION 14,5
68 ? "Clock Rate"
70 POSITION 6,14
72 ? "Use joystxck (0)  up/down"
75 SOUND 0,0,0,0
80 REM * Set channel 1 clock to 64 KHZ *
82 REM * by using the AUDCTL    *
90 POKE 53768,1
110 REM *
120 REM * Set frequency for channel 1 *
130 POKE 53760,125
140 REM *
150 REM * Set distortion and volume *
155 REM * for channel 1      *
160 REM * use Control Register 1 *
170 POKE 53761,175
180 REM *
190 REM * Unput joystick data *
200 ST=5TICK(0)
210 IF ST=14 THEN S=S+1
220 IF ST=13 THEN S=S-1
230 IF S>3 THEN S=3
240 IF S<1 THEN S=1
250 P0SITION 16,10
260 IF S=1 THEN ? "15 KHZ  "
270 IF S=2 THEN ? "64 KHz  "
280 IF S=3 THEN ? "1.79 MHz"
290 REM *
300 REM * POKE clock Commands into *
310 REM * the AUDCTL (channel 1)   *
320 REM *
330 REM * 15 KHz
340 IF S=1 THEN POKE 53768,1
350 REM *
360 REM * 64 KHZ
370 IF S=2 THEN POKE 53768,0
380 REM *
390 REM * 1.79 MHz
400 IF S=3 THEN POKE 53768,64
410 FOR X=1 TO 50:NEXT X
420 GOTO 200


0 REM * CHECK DATA: CLOCK RATE TEST *
10 DATA 7919,426,241,805,242,428,482,962,880,155,380,150,609,44,63,428,989,635
120 DATA 6972,253,127,638,215,207,798,137,642,643,72,524,526,269,264,243,704,710
280 DATA 8964,751,644,957,528,638,74,770,641,81,773,644,187,826,622,828


BIT 4&3

    Setting bit 4 causes channels 1 and 2 to join, producing a single 16 bit channel. Normally each channel has 256 (2^8) different frequency positions. However, when two channels are joined, the number of frequency positions increases to 65535 (2^6). Below is a short program which joins channels 1 and 2, so that fine adjustments in the sound frequency can be made.

10 REM *************************
12 REM *                       *
15 REM * 16 bit demo program   *
17 REM *                       *
20 REM *************************
30 GRAPHICS 0
32 POSITION 10,4
34 ? "16 bit channel test"
35 POKE 752,1
40 C=100:C1=100
42 POSITION 4,8
44 ? "LOC. 53760    53762"
45 POSITION 8,12
46 ? " FINE    COURSE    ADJUSTMENTS"
47 POSITION 1,14:? "Joystick  1   2   up/down  "
48 REM * Clock rate to 1.79 MHZ(64) *
49 REM * Join channels 1 & 2 (16) *
50 POKE 53768,80
55 REM *
57 REM * set volume of channel 1 to Zero *
60 POKE 53761,145
65 REM *
67 REM * give channel 2 pure tone at maximum volume *
70 POKE 53763,175
74 REM *
78 REM * input joystick information *
80 ST=STICK(0)
90 STI=STICK(1)
100 IF ST=14 THEN C=C+1
110 IF ST=13 THEN C=C-1
120 IF ST1=14 THEN C1=C1+-1
138 IF ST1=13 THEN C1=C1-1
131 IF C>255 THEN C=255
132 IF C<0 THEN C=0
134 IF C1>255 THEN C1=255
135 IF C1<0 THEN C1=0
136 REM *
137 REM * input for fine tuning *
140 POKE 53760,C
145 REM *
147 REM * input for coarse tuning *
158 POKE 53762,C1
152 POSITION 10,10
155 ? C;"     ";C1;"  "
160 GOTO 80


0 REM CHECK DATA FOR 16 BIT DEMO PROG
l0 DATA 8153,594,366,460,371,595,959,142,148,877,940,102,374,152,285,641,718,429
50 DATA 6667,40,595,557,84,596,659,90,596,400,30,81,490,492,639,641,447,230
134 DATA 4329,Sd8,331,643,812,43,643,32,95,238,157,787

Line 60 sets bits 6 and 4 causing channel 1 and 2 to join, and the clock rate to be 1.79 MKz. Because channel 1 has no longer any output, Line 60 reduces the volume of this channel to zero. Line 70 enables channel 2 to generate a pure tone (no distortion) with maximum volume. The Frequency Register for channel 1 is used as a fine (low byte) frequency dial for channel 2, whereas the Frequency Register for channel 2 becomes the coarse (high byte) frequency dial. Use joystick (0) for fine sound adjustments, and joystick 1 for coarse. Setting bit 3 of the AUDCTL joins channels 3 and 4 in much the same way as described above.

BIT 2 & 1

    Bit 2 and 1 control the high pass filters. A high pass filter allows only sound frequencies that are higher than a specified amount to be released. When bit 2 is set, channel 1 is passed through a high pass filter that is clocked by channel 3. This means that channel 1 will be able to generate only frequencies that are higher than the current frequency of channel 3. For example, if channel 3 is generating a sound frequency of 40 KHz, channel 1 would be able to create only sounds that are higher then this amount. Bit 1 of the AUDCTL works in much the same way as does bit 2, the only exceptions being that channel 2 uses the high pass filter, and channel 4, clocks it. The following program demonstrates the effects of a high pass filter. In it, channel 1 uses a high pass filter, whereas channel 3 specifies what frequencies are to be filtered out. Notice how the program first enables a filter (line 150), then provides volume for channel 1 (line 200), and finally eliminates any sound output from channel 3. After RUNning the utility, use the joystick to set both Frequency Registers 1 and 3 with `255. Then slowly decrease the number in Register 3. Notice how the decrease of the values stored in register 3 causes only the higher frequencies of channel 1 to be generated. (filtering!)


10 REM *************************
20 REM *                       *
30 REM * High Pass Filter Test *
40 REM *                       *
50 REM *************************
70 F1=150:F3=125
88 GRAPHICS 0
89 POKE 752,1
90 POSITION 16,6
92 ? "Filtered / Clocked"
93 POSITION 1,8
94 ? "Frequency Register: 1   3"
95 POSITION 12,3
96 ? "High Filter Test"
97 POSITION 4,12
98 ? "Use Joysiick (0)"
100 SOUND 0,0,0,0
110 REM *
120 REM * Enable high pass filter *
130 REM * into channel 1 clock by *
140 REM * channel 3               *
150 POKE 53768,4
160 REM *
170 REM * Give channel 1 pure tone & *
180 REM * maximum volume /store to *
190 REM * Control Register 1(AUDC1)*
200 POKE 53761,175
210 REM *
220 REM * Set the volume of        *
230 REM * channel 3 to Zero        *
240 REM * Control Register 3(AUDC3)4*
250 POKE 53765,0
260 REM *
270 ST=STICK(0)
280 IF ST=14 THEN F1=F1+1
290 IF ST=13 THEN F1=F1-1
300 IF ST=11 THEN F3=F3+1
310 IF ST=7 THEN F3=F3-1
312 IF F1>255 THEN F1=255
314 IF F1<0 THEN F1=0
316 IF F3>255 THEN F3=255
318 IF F3<0 THEN F3=0
320 REM *
330 REM * POKE frequency for channel 1 *
340 REM * Frequency Register 1 (AUDF1) *
350 POKE 53760,F1
360 REM *
370 REM * POKE frequency for channel 3 *
380 REM * Frequency Register 3 (AUDF3) *
390 POKE 53764,F3
400 REM *
410 POSITION 21,10
420 ? F1;"  ";F3;"  "
500 GOTO 270


0 REM CHECK DATA FOR HIGH PASS FILTER TEST
10 DATA 7464,594,365,611,367,598,12,972,886,154,76,105,624,152,939,155,773,81
118 DATA 7413,635,922,834,4,37,640,0,105,819,131,636,561,519,819,31,641,79
280 DATA 6919,603,605,597,557,552,336,560,344,638,259,92,98,642,265,26,108,637
410 DATA 1184,237,113,834


BIT 0

Setting bit 0 causes the timing system to use the 64 KHz clock instead of the 15 KHz clock. Because of this higher clock rate, all sounds will be generated at a  higher frequency (pitch). For a demonstration of this effect, examine the program that was used in conjunction with the BITs 6 & 5, the CLOCK RATE TEST.